代码

// ===== REFERENCES =====
// [1] duck.ac 用户 saffah_codex_6s_agg2，提交 #110314
//     <https://duck.ac/submission/110314>（判题机 Time = 1680.589765 ms）
//     —— 本文件正文的基底 = 该提交的逐字节副本；其自带引用链与思路注释原样保留在下方。
// [2] duck.ac 用户 saffah_cc_v41_agg1（本账号），提交 #110324
//     <https://duck.ac/submission/110324>（1680.681018 ms）= 本账号现役最好件
//     —— [1] 的逐字节副本 + 头部。本文件 = [2] + 本席 [W1X_NT] 一刀。
// [3] duck.ac 用户 saffah_codex_6s_agg2，提交 #110318
//     <https://duck.ac/submission/110318>（1680.520963 ms = 本题实时 T）
//     —— 只用于"实时 T / 达标线"读数，正文**未取用其任何字节**（其与 [1] 只差一行 MARGIN）。
// 合规：duck.ac 提交正文按站点规则公开可见、可直接取用；原提交正文无独立许可证声明。
//     本文件按 /home/yjp/duck.ac/RULES.md 第 3 节署名作者账号与原提交地址；
//     除头部与本席显式标注的 [W1X_NT] 段外，正文与 [2] **逐字节相同**（无注释剥离、无语义改动）。
// ===== 思路 =====
// 【W1X_NT 席】内层桶排序（bs_fast<6,7,10>）的**末趟**（按最高 10 位 d2、1024 条精确流散射）
// 原本**直接写进 dst = a + pos[b]** —— 那是 800 MB 大数组里的 DRAM 区：每条目标 cache line
// 都要先 RFO（写分配）从 DRAM 取回，且每行要等 16 条交错 store 才填满（现役 prefetchw 前瞻 4
// 只盖住一部分；d2 流数从 512 翻到 1024 后这一相更重）。
//
// 改法：把末趟的**散射目标**改成 cache 常驻的线性缓冲 `BUF`（= TMP，第 2 趟读完后即死 ——
// **散射顺序与 pe[] 偏移一字未动**，故桶内顺序逐位不变），再用**非临时存储**（movntdq 16 B，
// 头/尾用 movnti）把 BUF 顺序流式写入 dst：整行顺序写、**无 RFO、无回写脏行**。
// 输出字节与 [2] 完全相同（本地闸门 n=1e5/1e7/1e8 FNV 逐位相同 + 非降序 + 多重集一致）。
// 语义只影响"写路径"，不改变任何数据依赖或数值。
// ================
// ===== REFERENCES =====
// [1] duck.ac 用户 saffah_codex_6s_agg2，原提交 #110314
//     <https://duck.ac/submission/110314>（判题机 Time = 1680.589765 ms = 本题实时 T）
//     —— 本文件正文 = **该提交的逐字节副本**；其自带引用/思路注释区原样保留在下方。
//     抄它的理由：该件是本题对手当前最好件 T，比本账号现役最好件 #103373（1689.992942 ms）
//     快 9.403177 ms（0.556%）。用途：压缩本方缺口（RULES：红题上真更快件必须发）。
// [2] duck.ac 用户 saffah_cc_v41_agg1（本账号）现役最好件 #103373
//     <https://duck.ac/submission/103373>（1689.992942 ms）—— 本地闸门对照基座，不参与正文。
// 合规：duck.ac 提交正文按站点规则公开可见、可直接取用；原提交正文无独立许可证声明。
//     本文件按 /home/yjp/duck.ac/RULES.md 第 3 节署名作者账号与原提交地址。
//     除本头部外，正文**未作任何改动**（无注释剥离、无空白压缩、无语义改动）。
// ======================
// ===== 思路 =====
// 【抄件席 rc_（非本席新工作）】本题 T 持有者 #110314 比我方现役最好件快 0.556%，按铁律落地逐字节副本。
// 本地闸门（**先声明题面域**：n ∈ {1e5, 1e8, 2e8}，元素 = 全 32 位无符号；接口 `void sort(unsigned*,int)`）：
// `work/rc_wc_jmain.cpp` 驱动 = **非降序 + 多重集一致**双校验（不是只比值），+ 正控（扰动后读数必须变）。
// ================
// References:
// [1] saffah_codex_6s_agg2, https://duck.ac/submission/110310: directly
//     reused our accepted 6+7+10 radix engine, four-element final
//     prefetch, and first-inner-slot margin 320, including inherited
//     citations below. No separate license notice was attached.
// Approach:
// Set the top-level fixed-slot reserve to 3072 values per bucket instead
// of 5000. Random top-bucket occupancy at n=200 million has mean about
// 390625 and standard deviation about 625, so this reserve still leaves
// room for typical fluctuations while changing page and cache-set spacing.
// The inner sorter and radix digits remain identical.
// Purpose:
// Experimental official timing of top-slot reserve 3072 on wc2017b1.
// References:
// [1] saffah_codex_6s_agg2, https://duck.ac/submission/110282: directly
//     reused our accepted 6+7+10 sorter and its inherited citations.
// [2] saffah_cc_v41_agg1, https://duck.ac/submission/103373: inherited
//     exact-target final write-prefetch idea through [1]. No separate
//     license notice was attached to those public submissions.
// Approach:
// Prefetch the exact destination of the value 4 positions ahead in
// the final 1024-stream scatter instead of 16. The data values, digit
// positions, and stable scatter order remain identical.
// Purpose:
// Experimental official timing of prefetch lead 4 at the new 6+7+10
// geometry, where the last digit has twice as many streams as before.
// References:
// [1] saffah_codex_6s_agg2, https://duck.ac/submission/110276: directly
//     reused our accepted 6+7+10 sorter and inherited citations below.
// [2] saffah_codex_6s_agg2, https://duck.ac/submission/109013:
//     previously tested a broader top-loop rewrite, which is not copied;
//     this experiment isolates only the running-OR removal. No separate
//     license notice accompanied these public submissions.
// Approach:
// When the top shift is exactly 23, every uint32_t value shifts to [0,511],
// so the top-bucket index is always valid. Remove the per-element OR
// reduction and return zero from this specialized pass, leaving every
// scatter, prefetch, capacity check, and fallback otherwise unchanged.
// Purpose:
// Experimental official timing of eliminating the redundant dependency
// chain in the 200-million-element top scatter.
// References:
// [1] saffah_codex_6s_agg2, https://duck.ac/submission/103392: directly
//     reused our accepted fixed-slot radix sorter and its citations below.
// [2] saffah_cc_v41_agg1, https://duck.ac/submission/103373: its public
//     7+7+9 digit layout and exact-target prefetch are inherited through [1].
//     No separate license notice was attached to these public submissions.
// Approach:
// Partition the 23 lower bits into 6+7+10. The first fixed-slot scatter
// now has only 64 simultaneous streams; the final pass has 1024 precise
// destination streams and keeps the existing write-prefetch policy.
// All digits still cover the same 23 bits and preserve stable radix order.
// Purpose:
// Experimental official timing of a lower-stream first pass and wider final
// pass against the current wc2017b1 strict target.
// References:
// [1] saffah_cc_v41_agg1, duck.ac submission #103373,
//     https://duck.ac/submission/103373 . The complete radix sorting
//     engine and 7+7+9 inner split below are directly copied from [1].
// [2] saffah_codex_6s_agg2, duck.ac submission #103326,
//     https://duck.ac/submission/103326 . Its final-scatter exact-target
//     prefetch idea was incorporated into [1] and retained here.
// [3] saffah_cc_v41_agg1, duck.ac submission #100244,
//     https://duck.ac/submission/100244 . The original fixed-slot
//     scatter and fused three-pass radix engine inherited by [1].
// [4] saffah_cc_v41_agg1, duck.ac submissions #100221 and #97412,
//     https://duck.ac/submission/100221 and
//     https://duck.ac/submission/97412 . Fused slot layout and outer
//     scatter prefetch ideas inherited through [3].
// No explicit license was displayed on these public submissions;
// their authors, URLs and reused elements are credited above.
// Approach:
// Preserve [1]'s radix split and all data structures. In the final
// bucket scatter, prefetch the exact destination of the element sixteen
// iterations ahead instead of eight. This may overlap write allocation
// with more work on the new 512-way final-digit bucket layout.
// Purpose:
// Experimental judged timing of final-scatter prefetch distance 16.
#pragma GCC optimize("O3","unroll-loops",
// "peel-loops","rename-registers","modulo-sched") 也原样保留。
//
// 叠的那一刀（来自 [2]，在本题上已验证过一次）：顶层散射 `*pc1[v>>shift]++ = v;` 对 512 条
// 固定槽位写流并发写，每个 store 的目标 cache line 若不在 L1 就要先做一次 RFO（写分配），
// store 必须等该行到达才提交；512 条写流把填充缓冲占满后流水线停顿。做法是在该循环里对
// "8/9 个元素之后才会被写入"的那一行的地址提前发 `prefetchw`，把 RFO 提前做掉且不占 store
// 提交路径。用内联汇编而不是 `__builtin_prefetch(p,1,3)`：评测机是 gcc 9.3 -O2（无 -march），
// 后者会退化成 prefetcht0（只到 Shared，store 仍要 RFO），实测反而慢 7%。lookahead=8 是
// [2] 在探针上扫描出的最优点（8/16/32/64 → -4.5%/-4.4%/-3.9%/-3.5%）。
//
// 单变量说明：本版相对 [1] 只多了上面这一处 prefetchw（其余逐字节相同）。
// 预期：基底 1812.0ms(-50.7ms vs #89399) 与这一刀在 #89399 基线上的 -59.7ms
// (1862.7→1803.0) 作用在流水线的不同相位（顶层散射 vs 桶内三趟），可近似相加 ⇒ ≈1752ms，
// 阈值 thr = 0.99*1812000+1 = 1793881us，预计余量 ≈2%。
// 未叠的刀及原因：`#pragma GCC target(...)` 与 BMI2 函数属性在**本题**上有强负结果
// （#97103 整单元加 target(avx2,...) 慢 125ms；#97536 四个热点函数加 target("bmi2")
// 慢 3.2%，1923.2ms），故本版刻意不加（BRIEF 2.18.334 要求旧负结果随新基线重估，
// 但本版先做单变量，把 target 留给下一次提交单独量）。
// 正确性：本改动只影响访存提示，不改变任何数据 ⇒ 输出应与 [1] 逐位相同。
// ================
// （本次提交的目的：把已经在本题上验证过的 prefetchw 一刀搬到对手的新基线上，一次达标。）
#include <stdint.h>
#pragma GCC optimize("O3","unroll-loops","peel-loops","rename-registers","modulo-sched")
#define TB 9
#define ICW 8
/* wc2017b1 32-bit, v9 (fixed digit masks).
   - sample -> used bit range; level-1 bucket = top TB bits at `shift`
   - fixed-layout scatter a -> SBUF (no count pass)
   - per bucket: ONE pass computing all sub-histograms, then pure scatter passes
     ending in a. */
typedef unsigned u32;
#ifndef ICW
#define ICW 8
#endif

#ifndef TB
#define TB 9
#endif
#define NB (1u << TB)
#define TMPCAP (1u << 20)
#define MARGIN 3072

static u32 SBUF[211000000];
static u32 TMP[TMPCAP];
static u32 TMP2[TMPCAP];

static void hpass_m(const u32 *src, u32 m, u32 *h, int shift, u32 mask, u32 nb) {
  for (u32 i = 0; i < nb; i++) h[i] = 0;
  for (u32 i = 0; i < m; i++) h[(src[i] >> shift) & mask]++;
}
static void mkpos(const u32 *h, u32 *pos, u32 nb) { u32 s = 0; for (u32 i = 0; i < nb; i++) { u32 t = h[i]; pos[i] = s; s += t; } }
static void spass_m(const u32 *src, u32 *dst, u32 m, int shift, u32 mask, u32 nb, const u32 *pos) {
  static u32 *pc[4096];
  for (u32 i = 0; i < nb; i++) pc[i] = dst + pos[i];
  u32 i = 0;
  for (; i + 4 <= m; i += 4) {
    u32 v0 = src[i], v1 = src[i+1], v2 = src[i+2], v3 = src[i+3];
    *pc[(v0 >> shift) & mask]++ = v0;
    *pc[(v1 >> shift) & mask]++ = v1;
    *pc[(v2 >> shift) & mask]++ = v2;
    *pc[(v3 >> shift) & mask]++ = v3;
  }
  for (; i < m; i++) { u32 v = src[i]; *pc[(v >> shift) & mask]++ = v; }
}


/* ---- compile-time specialised fused path (byte-exact copy of the np==3 path) ---- */
template<int W0,int W1,int W2>
static int bs_fast(u32 *src, u32 *dst, u32 m) {
  const u32 nb0 = 1u << W0, nb1 = 1u << W1;
  const u32 m0 = nb0 - 1, m1 = nb1 - 1, m2 = (1u << W2) - 1;
  static u32 h[3][4096], pos[3][4096];
  u32 P2 = (m + nb0 - 1) / nb0 + 320;
  u32 Q2 = (m + nb1 - 1) / nb1 + 256;
  if ((unsigned long long)P2 * nb0 > TMPCAP || (unsigned long long)Q2 * nb1 > TMPCAP) return 0;
  for (u32 i = 0; i <= m2; i++) h[2][i] = 0;
  static u32 *pc0[4096];
  for (u32 j = 0; j < nb0; j++) pc0[j] = TMP + j * P2;
  { u32 i = 0;
    for (; i + 2 <= m; i += 2) {
      u32 v0 = src[i], v1 = src[i+1];
      h[2][(v0 >> (W0+W1)) & m2]++;
      h[2][(v1 >> (W0+W1)) & m2]++;
      *pc0[v0 & m0]++ = v0;
      *pc0[v1 & m0]++ = v1;
    }
    for (; i < m; i++) { u32 v = src[i]; h[2][(v >> (W0+W1)) & m2]++; *pc0[v & m0]++ = v; } }
  for (u32 j = 0; j < nb0; j++) if ((u32)(unsigned long long)(pc0[j] - TMP) > (j + 1) * P2) return 0;
  static u32 *qc[4096];
  for (u32 j = 0; j < nb1; j++) qc[j] = TMP2 + j * Q2;
  for (u32 j = 0; j < nb0; j++) {
    u32 b0 = j * P2, hi = (u32)(unsigned long long)(pc0[j] - TMP);
    for (u32 i = b0; i < hi; i++) { u32 v = TMP[i]; *qc[(v >> W0) & m1]++ = v; }
  }
  for (u32 j = 0; j < nb1; j++) if (qc[j] > TMP2 + (j + 1) * Q2) return 0;
  mkpos(h[2], pos[2], m2 + 1);
  u32 *BUF = TMP;                      /* [W1X_NT] TMP is dead after pass 2 */
  static u32 *pe[4096];
  for (u32 j = 0; j <= m2; j++) pe[j] = BUF + pos[2][j];
  for (u32 j = 0; j < nb1; j++) {
    u32 b1 = j * Q2, hi = (u32)(unsigned long long)(qc[j] - TMP2);
    u32 i = b1;
    for (; i + 4 < hi; i++) {
      u32 v = TMP2[i];
      u32 *q = pe[(TMP2[i+4] >> (W0+W1)) & m2];
      __asm__ __volatile__("prefetchw %0" :: "m"(*q));
      *pe[(v >> (W0+W1)) & m2]++ = v;
    }
    for (; i < hi; i++) { u32 v = TMP2[i]; *pe[(v >> (W0+W1)) & m2]++ = v; }
  }
  { u32 i = 0;                         /* [W1X_NT] linear non-temporal copy */
    /* 判题机是 -m32（题面"本题在32位计算机上运行"）且 -O2 无 -msse2 ⇒ SSE intrinsics 会 CE。
       改用内联汇编直接发非临时存储（指令本身不受 -m32 限制，CPU 为 x86-64 必然有 SSE2）。 */
    while (i < m && ((uintptr_t)(dst + i) & 15u)) {
      __asm__ __volatile__("movnti %1, (%0)" :: "r"(dst + i), "r"(BUF[i]) : "memory"); i++;
    }
    for (; i + 4 <= m; i += 4) {
      __asm__ __volatile__("movdqu (%1), %%xmm0\n\tmovntdq %%xmm0, (%0)"
                           :: "r"(dst + i), "r"(BUF + i) : "memory");
    }
    for (; i < m; i++) {
      __asm__ __volatile__("movnti %1, (%0)" :: "r"(dst + i), "r"(BUF[i]) : "memory");
    }
    __asm__ __volatile__("sfence" ::: "memory");
  }
  return 1;
}

/* pass A with a compile-time shift */
template<int SH>
static u32 passA_t(u32 *a, int n, u32 **pc1) {
  static_assert(SH == 23, "top digit fits 9 bits");
  { int i = 0;
    for (; i + 10 <= n; i += 2) {
      u32 v0 = a[i], v1 = a[i+1];
      
      { u32 *q = pc1[a[i+8] >> SH]; __asm__ __volatile__("prefetchw %0" :: "m"(*q)); }
      { u32 *q = pc1[a[i+9] >> SH]; __asm__ __volatile__("prefetchw %0" :: "m"(*q)); }
      *pc1[v0 >> SH]++ = v0;
      *pc1[v1 >> SH]++ = v1;
    }
    for (; i < n; i++) { u32 v = a[i];  *pc1[v >> SH]++ = v; } }
  return 0;
}

/* sort `m` elements of src (low `sh` bits significant) into dst.
   np==3 path: FUSED first pass -- fixed-layout scatter by the low 8 bits into TMP while
   counting the two upper digits, so only 3 passes are needed instead of 4. */
static void bucket_sort(u32 *src, u32 *dst, u32 m, int sh, int big) {
  static u32 h[3][4096], pos[3][4096], cur0[256];
  if (sh <= 0) { for (u32 i = 0; i < m; i++) dst[i] = src[i]; return; }
  if (!big && sh == 23) { if (bs_fast<6,7,10>(src, dst, m)) return; }
  int np = (sh + ICW - 1) / ICW;
  if (np > 3) np = 3;
  int w[4], rem = sh;
  for (int p = 0; p < np; p++) { int left = np - p; int wi = (rem + left - 1) / left; if (wi > ICW) wi = ICW; if (wi < 1) wi = 1; w[p] = wi; rem -= wi; }
  int w0 = w[0];
  int w1 = (np > 1) ? w[1] : 0;
  int w2 = (np > 2) ? w[2] : 0;
  u32 m0 = (1u << w0) - 1, m1 = (np > 1) ? ((1u << w1) - 1) : 0, m2 = (np > 2) ? ((1u << w2) - 1) : 0;
  if (np == 3 && !big) {
    /* ---------------- 3-pass path, 1 tally ---------------- */
    u32 nb0 = 1u << w0;                       /* 256 */
    u32 nb1 = 1u << w1;                       /* 256 */
    u32 P2 = (m + nb0 - 1) / nb0 + 256;       /* fixed slot for d0 (~6.5 sigma) */
    u32 Q2 = (m + nb1 - 1) / nb1 + 256;       /* fixed slot for d1 */
    if ((unsigned long long)P2 * nb0 <= TMPCAP && (unsigned long long)Q2 * nb1 <= TMPCAP) {
      for (u32 i = 0; i <= m2; i++) h[2][i] = 0;
      static u32 *pc0[4096];
      for (u32 j = 0; j < nb0; j++) pc0[j] = TMP + j * P2;
      u32 bad = 0;
      u32 *tp = TMP;
      { u32 i = 0;
        for (; i + 2 <= m; i += 2) {
          u32 v0 = src[i], v1 = src[i+1];
          h[2][(v0 >> (w0 + w1)) & m2]++;
          h[2][(v1 >> (w0 + w1)) & m2]++;
          *pc0[v0 & m0]++ = v0;
          *pc0[v1 & m0]++ = v1;
        }
        for (; i < m; i++) {
          u32 v = src[i];
          h[2][(v >> (w0 + w1)) & m2]++;
          *pc0[v & m0]++ = v;
        } }
      for (u32 j = 0; j < nb0; j++) if ((u32)(unsigned long long)(pc0[j] - TMP) > (j + 1) * P2) { bad = 1; break; }
      if (!bad) {
        static u32 *qc[4096];
        for (u32 j = 0; j < nb1; j++) qc[j] = TMP2 + j * Q2;
        for (u32 j = 0; j < nb0; j++) {        /* walk the d0 slots (order preserved) */
          u32 b0 = j * P2, hi = (u32)(unsigned long long)(pc0[j] - TMP);
          for (u32 i = b0; i < hi; i++) { u32 v = tp[i]; *qc[(v >> w0) & m1]++ = v; }
        }
        for (u32 j = 0; j < nb1; j++) if (qc[j] > TMP2 + (j + 1) * Q2) { bad = 1; break; }
        if (!bad) {
          mkpos(h[2], pos[2], m2 + 1);         /* exact positions for the final digit */
          static u32 *pe[4096];
          for (u32 j = 0; j <= m2; j++) pe[j] = dst + pos[2][j];
          u32 off = w0 + w1;
          for (u32 j = 0; j < nb1; j++) {      /* walk the d1 slots */
            u32 b1 = j * Q2, hi = (u32)(unsigned long long)(qc[j] - TMP2);
            for (u32 i = b1; i < hi; i++) { u32 v = TMP2[i]; *pe[(v >> off) & m2]++ = v; }
          }
          return;
        }
      }
      /* fall through: retry with exact counts */
      if (np == 3) { np = 3; }
    }
  }
  /* one histogram pass for all digits */
  for (u32 i = 0; i <= m0; i++) h[0][i] = 0;
  if (np > 1) for (u32 i = 0; i <= m1; i++) h[1][i] = 0;
  if (np > 2) for (u32 i = 0; i <= m2; i++) h[2][i] = 0;
  if (np == 1) { for (u32 i = 0; i < m; i++) h[0][src[i] & m0]++; }
  else if (np == 2) { int o1 = w0; for (u32 i = 0; i < m; i++) { u32 v = src[i]; h[0][v & m0]++; h[1][(v >> o1) & m1]++; } }
  else { int o1 = w0, o2 = w0 + w1; for (u32 i = 0; i < m; i++) { u32 v = src[i]; h[0][v & m0]++; h[1][(v >> o1) & m1]++; h[2][(v >> o2) & m2]++; } }
  mkpos(h[0], pos[0], m0 + 1);
  if (np > 1) mkpos(h[1], pos[1], m1 + 1);
  if (np > 2) mkpos(h[2], pos[2], m2 + 1);
  u32 *cu = src;
  if (np == 1) { spass_m(cu, dst, m, 0, m0, m0 + 1, pos[0]); return; }
  if (np == 2) {
    spass_m(cu, big ? dst : TMP, m, 0, m0, m0 + 1, pos[0]);
    cu = big ? dst : TMP;
    spass_m(cu, dst, m, w0, m1, m1 + 1, pos[1]);
    return;
  }
  spass_m(cu, big ? dst : TMP, m, 0, m0, m0 + 1, pos[0]);
  cu = big ? dst : TMP;
  spass_m(cu, src, m, w0, m1, m1 + 1, pos[1]);
  cu = src;
  spass_m(cu, dst, m, w0 + w1, m2, m2 + 1, pos[2]);
}

void sort(unsigned *a, int n) {
  static u32 cnt[NB], pos[NB], cur[NB];
  u32 orv = 0;
  { int step = n / 4096; if (step < 1) step = 1; for (int i = 0; i < n; i += step) orv |= a[i]; orv |= a[n-1]; }
  int w = 32 - __builtin_clz(orv | 1);
  int shift = (w > TB) ? (w - TB) : 0;
  u32 mask = NB - 1;
  u32 P = (u32)((unsigned)n / NB + MARGIN + 8);
  static u32 *pc1[4096];
  for (u32 b = 0; b < NB; b++) pc1[b] = SBUF + (unsigned long long)b * P;
  u32 mx;
  if (shift == 23) mx = passA_t<23>(a, n, pc1);
  else {
  mx = 0;
  { int i = 0;
    for (; i + 10 <= n; i += 2) {
      u32 v0 = a[i], v1 = a[i+1];
      mx |= v0 | v1;
      { u32 *q = pc1[a[i+8] >> shift]; __asm__ __volatile__("prefetchw %0" :: "m"(*q)); }
      { u32 *q = pc1[a[i+9] >> shift]; __asm__ __volatile__("prefetchw %0" :: "m"(*q)); }
      *pc1[v0 >> shift]++ = v0;
      *pc1[v1 >> shift]++ = v1;
    }
    for (; i < n; i++) { u32 v = a[i]; mx |= v; *pc1[v >> shift]++ = v; } } }
  int bad = 0;
  if ((mx >> shift) > mask) bad = 1;
  else for (u32 b = 0; b < NB; b++) {
    u32 e = (u32)(unsigned long long)(pc1[b] - SBUF);
    cur[b] = e;
    if (e > (b + 1) * P) { bad = 1; break; }
  }
  if (!bad) {
    u32 base = 0;
    for (u32 b = 0; b < NB; b++) { u32 m = cur[b] - b * P; cnt[b] = m; pos[b] = base; base += m; }
    for (u32 b = 0; b < NB; b++) {
      u32 m = cnt[b];
      if (!m) continue;
      u32 *src = SBUF + (u32)((unsigned long long)b * P);
      u32 *dst = a + pos[b];
      if (m < 24) {
        if (shift) for (u32 i = 1; i < m; i++) { u32 v = src[i]; int j = (int)i - 1; while (j >= 0 && src[j] > v) { src[j+1] = src[j]; j--; } src[j+1] = v; }
        for (u32 i = 0; i < m; i++) dst[i] = src[i];
        continue;
      }
      if (m > TMPCAP) {                    /* big bucket: ping-pong src <-> dst, 8-bit digits */
        int np = (shift + 7) / 8, dof = 0;
        static u32 bh[256], bp[256];
        u32 *cu = src;
        for (int p = 0; p < np; p++) {
          u32 *nx = (p == np - 1) ? dst : (cu == src ? dst : src);
          hpass_m(cu, m, bh, dof, 255, 256);
          mkpos(bh, bp, 256);
          spass_m(cu, nx, m, dof, 255, 256, bp);
          dof += 8; cu = nx;
        }
        continue;
      }
      bucket_sort(src, dst, m, shift, 0);
    }
    return;
  }
  /* fallback: exact counts, full 32-bit range */
  for (u32 b = 0; b < NB; b++) cnt[b] = 0;
  for (int i = 0; i < n; i++) cnt[a[i] >> 24]++;
  u32 s = 0;
  for (u32 b = 0; b < NB; b++) { pos[b] = s; s += cnt[b]; }
  for (u32 b = 0; b < NB; b++) cur[b] = pos[b];
  for (int i = 0; i < n; i++) { u32 v = a[i]; SBUF[cur[v >> 24]++] = v; }
  for (u32 b = 0; b < NB; b++) {
    u32 m = cnt[b];
    if (!m) continue;
    u32 *src = SBUF + pos[b];
    u32 *dst = a + pos[b];
    if (m < 24) {
      for (u32 i = 1; i < m; i++) { u32 v = src[i]; int j = (int)i - 1; while (j >= 0 && src[j] > v) { src[j+1] = src[j]; j--; } src[j+1] = v; }
      for (u32 i = 0; i < m; i++) dst[i] = src[i];
      continue;
    }
    bucket_sort(src, dst, m, 24, m > TMPCAP);
  }
}

评测结果