// ===== 引用区（REFERENCES）=====
// [1] duck.ac 账号 saffah_cc_v41_agg1，提交 #130877
// <https://duck.ac/submission/130877>（题 1012，2.511 s，Accepted）。
// —— 本文件正文（本引用区之后的第一条预处理指令起至文件末尾）= 该提交的**代码正文逐字节副本**；
// 本发相对它的唯一改动见下方【思路区】。 该件正文自带的上游引用链/署名（含 saffah_codex_6a_agg3 等公开提交）在原提交头部注释中，本发未改动其代码正文。
// [2] duck.ac 题目页 <https://duck.ac/problem/1012>（站点 FAQ 明示：提交的代码将会被公开，所有人可见）。
// LICENSE：上述均为 duck.ac 公开提交，无第三方许可证声明、非来自任何外部仓库；
// 按“账号 + 原提交 URL + 所用内容”具名引用使用，遵守站点公开规则，不附加额外限制。
// 本件未参考任何已发表论文 / 外部开源仓库。
// ===== 思路区（本发目的与改动）=====
// 【本发单变量（唯一改动）】文件级 #pragma GCC target(avx2,popcnt,bmi2) 内追加 tune=skylake（仅改既有行，未新增/重复 pragma；该 rig 拒绝重复 target pragma）。
// 【依据】本队跨题经验：tune 单轴在判题机上的符号与量级需逐题单发（mmm 家族公开提交注释记录 skylake→broadwell 实测 −3.75%）。
// 【等价性】tune= 只影响指令调度/选择，不改变整数语义 ⇒ 输出逐位不变（本机校验和与基座相同）。
// 【目的】试验性/测量件：把 tune 档位交由判题机冷态单发定价，不改算法。
// ★本题底盘含两条 target pragma：热函数（第 54 行之后）由第二条（无 tune）覆盖，本发改的正是该条（此前热代码使用默认 tune）。
// ===== 代码正文 =====
#define KG_BASE 3072
#define MF_CTRPF 32
#ifndef MF_CTRPF
#define MF_CTRPF 0
#endif
#ifndef MF_CTR5
#define MF_CTR5 1
#endif
#ifndef MF_LEAFLP
#define MF_LEAFLP 128
#endif
#ifndef MF_LEAFG
#define MF_LEAFG 2
#endif
#pragma GCC optimize("O3","unroll-loops")
#pragma GCC target("avx2,bmi,bmi2,popcnt,lzcnt,tune=broadwell")
// duck.ac 1010 (4D) / 1011 (5D) -- "count for every point the number of points that are
// smaller in *every* dimension" (n = 300000, coords in [0,n), strict comparisons).
//
// Algorithm: D&C over dimensions on an event sequence, keys carried inline.
// * 2n events: one query event + one insert event per point, keyed by dim 0
// (a query event is stored *before* an insert event of the same key, which encodes
// the strict-inequality rule).
// * solve(seq,m,d): seq is ordered by dim d and every event carries the coordinate of
// dim d+1 in bits 32..63 of its u64. Split by position, recurse both halves, then
// merge the two halves by the carried key (a plain unsigned `<` on the packed u64,
// so equal keys keep query-before-insert order); the same pass collects the cross
// events (left inserts + right queries), re-keys them to dim d+2 and recurses one
// dimension deeper. Ordering by dim d with that tie rule makes "insert before query"
// exactly "all dims so far strictly smaller", and equal coordinates are never counted.
// * d == K-1: every insert-before-query pair now qualifies, so one O(m) running counter
// finishes the innermost dimension (no log factor).
// * m <= 32: direct O(m^2) counting plus an insertion sort.
//
// Local timings (i5-6500 @ 3.2GHz, best of 3, n = 300000 uniform random):
// 4D 1.57 s 5D 3.85 s
// (Board #1: 508.596 ms / 745.358 ms -- this is still 3x / 5x behind.)
// k-dimensional dominance counting: out[i] = #{j : all dims of j < dims of i}
//
// Event-sequence CDQ with keys carried inline.
// event (u64) = (key << 32) | (ins << 31) | id ins = 1 for an "insert" event
// key = coordinate of dim (level+1): the field used by this level's merge.
// The packing makes a plain unsigned comparison put, for equal keys, the query
// event first -- exactly the strict-inequality rule (equal coords must not count).
//
// solve(seq, m, d): seq is ordered by dim d (tie rule above), elements carry the
// key for dim d+1; count pairs (insert before query) with dims d+1..K-1 strictly
// smaller; return `out` = the same events merged by the carried key (= dim d+1).
// Cross = A-inserts + B-queries re-keyed to dim d+2, recursed at level d+1.
// d == K-1 : every (insert before query) pair qualifies -> running counter, O(m).
#include <cstring>
#include <immintrin.h>
#pragma GCC push_options
#pragma GCC target("avx2,popcnt,bmi2,tune=skylake")
#include <cstdint>
typedef unsigned u32;
typedef uint64_t u64;
typedef unsigned char u8;
typedef unsigned short u16;
#ifndef PFL
#define PFL 4
#endif
#ifndef KG_COND
#define KG_COND 0
#endif
#ifndef KG_PF
#define KG_PF 0
#endif
#ifndef KG_BASE
#define KG_BASE 4096
#endif
#ifndef LEAFNB
#define LEAFNB 4096
#endif
#define KG_MAXK 6
#define KG_ARENA (160u << 20)
namespace kg {
// ------------ fused innermost-dimension counter (prefix count over [0,n)) -------------
// AVX2. Levels: u8 leaf /32 values, u16 per 32 and per 256, u32 per 2048/16384/131072.
// Every u16 block count must stay <= 32767 (madd uses signed lanes); the guard (max
// multiplicity of a last-dim coordinate <= 127) bounds 32*127=4064 and 256*127=32512.
#define CT_MAXV 1048580u
struct alignas(64) PrefixCounterStorage {
alignas(64) u8 CT0[CT_MAXV];
alignas(64) u16 CT1[CT_MAXV / 32 + 64];
alignas(64) u16 CT2[CT_MAXV / 512 + 64];
alignas(64) u32 CT3[CT_MAXV / 8192 + 64];
alignas(64) u32 CT4[CT_MAXV / 131072 + 16];
};
static PrefixCounterStorage prefixct;
#define CT0 (prefixct.CT0)
#define CT1 (prefixct.CT1)
#define CT2 (prefixct.CT2)
#define CT3 (prefixct.CT3)
#define CT4 (prefixct.CT4)
/* [10ez6-L4] four upper layers instead of five: bits 5-8 / 9-12 / 13-16 / 17-19 (leaf = bits 0-4).
Same suffix-ladder semantics, one fewer scalar load per query and one fewer RMW per insert. */
// [SFX] suffix-counter increment masks. Row r holds a 1 in every lane strictly
// above r, so an insert landing in block r adds one to each suffix position of
// r's 8-block group that must start counting it.
static const u16 INC16[16][16] __attribute__((aligned(64))) = { {0,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1},{0,0,1,1,1,1,1,1,1,1,1,1,1,1,1,1},{0,0,0,1,1,1,1,1,1,1,1,1,1,1,1,1},{0,0,0,0,1,1,1,1,1,1,1,1,1,1,1,1},{0,0,0,0,0,1,1,1,1,1,1,1,1,1,1,1},{0,0,0,0,0,0,1,1,1,1,1,1,1,1,1,1},{0,0,0,0,0,0,0,1,1,1,1,1,1,1,1,1},{0,0,0,0,0,0,0,0,1,1,1,1,1,1,1,1},{0,0,0,0,0,0,0,0,0,1,1,1,1,1,1,1},{0,0,0,0,0,0,0,0,0,0,1,1,1,1,1,1},{0,0,0,0,0,0,0,0,0,0,0,1,1,1,1,1},{0,0,0,0,0,0,0,0,0,0,0,0,1,1,1,1},{0,0,0,0,0,0,0,0,0,0,0,0,0,1,1,1},{0,0,0,0,0,0,0,0,0,0,0,0,0,0,1,1},{0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1},{0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0} };
static const u32 INC32W[16][16] __attribute__((aligned(64))) = { {0,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1},{0,0,1,1,1,1,1,1,1,1,1,1,1,1,1,1},{0,0,0,1,1,1,1,1,1,1,1,1,1,1,1,1},{0,0,0,0,1,1,1,1,1,1,1,1,1,1,1,1},{0,0,0,0,0,1,1,1,1,1,1,1,1,1,1,1},{0,0,0,0,0,0,1,1,1,1,1,1,1,1,1,1},{0,0,0,0,0,0,0,1,1,1,1,1,1,1,1,1},{0,0,0,0,0,0,0,0,1,1,1,1,1,1,1,1},{0,0,0,0,0,0,0,0,0,1,1,1,1,1,1,1},{0,0,0,0,0,0,0,0,0,0,1,1,1,1,1,1},{0,0,0,0,0,0,0,0,0,0,0,1,1,1,1,1},{0,0,0,0,0,0,0,0,0,0,0,0,1,1,1,1},{0,0,0,0,0,0,0,0,0,0,0,0,0,1,1,1},{0,0,0,0,0,0,0,0,0,0,0,0,0,0,1,1},{0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1},{0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0} };
static const u32 INC32[8][8] __attribute__((aligned(32))) = {
{0,1,1,1,1,1,1,1},{0,0,1,1,1,1,1,1},{0,0,0,1,1,1,1,1},{0,0,0,0,1,1,1,1},
{0,0,0,0,0,1,1,1},{0,0,0,0,0,0,1,1},{0,0,0,0,0,0,0,1},{0,0,0,0,0,0,0,0}};
#define SFX16(p, r) do { __m256i _a = _mm256_load_si256((const __m256i *)(p)); \
__m256i _b = _mm256_load_si256((const __m256i *)(((const u16 *)INC16) + 16 * (size_t)(r))); \
_mm256_store_si256((__m256i *)(p), _mm256_add_epi16(_a, _b)); } while (0)
#define SFX32(p, r) do { __m256i _a = _mm256_load_si256((const __m256i *)(p)); \
__m256i _b = _mm256_load_si256((const __m256i *)(INC32 + (r))); \
_mm256_store_si256((__m256i *)(p), _mm256_add_epi32(_a, _b)); } while (0)
#define SFX32W(p, r) do { __m256i _a = _mm256_load_si256((const __m256i *)(p)); \
__m256i _c = _mm256_load_si256((const __m256i *)(((const u32 *)INC32W) + 16 * (size_t)(r))); \
_mm256_store_si256((__m256i *)(p), _mm256_add_epi32(_a, _c)); \
__m256i _d = _mm256_load_si256((const __m256i *)(p) + 1); \
__m256i _e = _mm256_load_si256((const __m256i *)(((const u32 *)INC32W) + 16 * (size_t)(r)) + 1); \
_mm256_store_si256((__m256i *)(p) + 1, _mm256_add_epi32(_d, _e)); } while (0)
static int FUSE_OK;
static inline u32 su8_32(const u8 *p, int cnt) {
__m256i v = _mm256_loadu_si256((const __m256i *)p);
__m256i m = _mm256_cmpgt_epi8(_mm256_set1_epi8((char)cnt),
_mm256_setr_epi8(0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15,
16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31));
__m256i x = _mm256_and_si256(v, m);
__m256i s = _mm256_sad_epu8(x, _mm256_setzero_si256());
__m128i t = _mm_add_epi64(_mm256_castsi256_si128(s), _mm256_extracti128_si256(s, 1));
return (u32)((unsigned long long)_mm_cvtsi128_si64(t) + (unsigned long long)_mm_extract_epi64(t, 1));
}
static inline u32 su16_8(const u16 *p, int cnt) {
__m128i v = _mm_loadu_si128((const __m128i *)p);
__m128i x = _mm_and_si128(v, _mm_cmpgt_epi16(_mm_set1_epi16((short)cnt),
_mm_setr_epi16(0, 1, 2, 3, 4, 5, 6, 7)));
__m128i s = _mm_madd_epi16(x, _mm_set1_epi16(1));
s = _mm_add_epi32(s, _mm_shuffle_epi32(s, _MM_SHUFFLE(1, 0, 3, 2)));
s = _mm_add_epi32(s, _mm_shuffle_epi32(s, _MM_SHUFFLE(2, 3, 0, 1)));
return (u32)_mm_cvtsi128_si32(s);
}
static inline u32 su32_8(const u32 *p, int cnt) {
__m256i v = _mm256_loadu_si256((const __m256i *)p);
__m256i x = _mm256_and_si256(v, _mm256_cmpgt_epi32(_mm256_set1_epi32(cnt),
_mm256_setr_epi32(0, 1, 2, 3, 4, 5, 6, 7)));
__m128i t = _mm_add_epi32(_mm256_castsi256_si128(x), _mm256_extracti128_si256(x, 1));
t = _mm_add_epi32(t, _mm_shuffle_epi32(t, _MM_SHUFFLE(1, 0, 3, 2)));
t = _mm_add_epi32(t, _mm_shuffle_epi32(t, _MM_SHUFFLE(2, 3, 0, 1)));
return (u32)_mm_cvtsi128_si32(t);
}
static const u8 INC8[32][32] __attribute__((aligned(32))) = {
{0,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1},
{0,0,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1},
{0,0,0,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1},
{0,0,0,0,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1},
{0,0,0,0,0,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1},
{0,0,0,0,0,0,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1},
{0,0,0,0,0,0,0,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1},
{0,0,0,0,0,0,0,0,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1},
{0,0,0,0,0,0,0,0,0,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1},
{0,0,0,0,0,0,0,0,0,0,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1},
{0,0,0,0,0,0,0,0,0,0,0,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1},
{0,0,0,0,0,0,0,0,0,0,0,0,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1},
{0,0,0,0,0,0,0,0,0,0,0,0,0,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1},
{0,0,0,0,0,0,0,0,0,0,0,0,0,0,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1},
{0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1},
{0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1},
{0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1},
{0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1,1,1,1,1,1,1,1,1,1,1,1,1,1},
{0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1,1,1,1,1,1,1,1,1,1,1,1,1},
{0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1,1,1,1,1,1,1,1,1,1,1,1},
{0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1,1,1,1,1,1,1,1,1,1,1},
{0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1,1,1,1,1,1,1,1,1,1},
{0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1,1,1,1,1,1,1,1,1},
{0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1,1,1,1,1,1,1,1},
{0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1,1,1,1,1,1,1},
{0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1,1,1,1,1,1},
{0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1,1,1,1,1},
{0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1,1,1,1},
{0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1,1,1},
{0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1,1},
{0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1},
{0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0}
};
static inline void leaf_add(u32 v) {
__m256i *p=(__m256i *)(CT0+(v&~31u));
_mm256_store_si256(p,_mm256_add_epi8(_mm256_load_si256(p),_mm256_load_si256((const __m256i *)INC8[v&31])));
}
static inline void leaf_sub(u32 v) {
__m256i *p=(__m256i *)(CT0+(v&~31u));
_mm256_store_si256(p,_mm256_sub_epi8(_mm256_load_si256(p),_mm256_load_si256((const __m256i *)INC8[v&31])));
}
static inline void ctr_ins(u32 v) {
leaf_add(v);
SFX16(CT1 + ((v >> 9) << 4), (v >> 5) & 15);
SFX16(CT2 + ((v >> 13) << 4), (v >> 9) & 15);
SFX32W(CT3 + ((v >> 17) << 4), (v >> 13) & 15);
SFX32(CT4, (v >> 17) & 7);
}
static inline void ctr_clr(u32 v) {
/* [CLR0] the block must end at zero anyway (leaf_add is exactly undone), so a plain
32-byte zero store is enough -- no load, no subtract. Written as two 16-byte stores
so gcc 9.3 (the judge's compiler) emits exactly two stores instead of a split 256-bit
store (vmovdqu xmm + vinserti128). */
u8 *p = CT0 + (v & ~31u);
__m256i zero=_mm256_setzero_si256();
__asm__ volatile("vmovdqa %1,%0":"=m"(*(__m256i*)p):"x"(zero));
(void)0;
}
// [CTRR] live bound of the coordinate values seen by ctr_* (set in run_t)
static u32 CTN;
static inline void ctr_reset_hi(void) {
memset(CT1, 0, sizeof(u16) * (((size_t)CTN >> 5) + 32));
memset(CT2, 0, sizeof(u16) * (((size_t)CTN >> 9) + 32));
memset(CT3, 0, sizeof(u32) * (((size_t)CTN >> 13) + 32));
memset(CT4, 0, sizeof(CT4));
}
static inline u32 ctr_qry(u32 v) {
u32 s = CT4[v >> 17];
s += CT3[v >> 13];
s += CT2[v >> 9];
s += CT1[v >> 5];
s += CT0[v];
return s;
}
static int K;
#ifndef LFAUTO
#define LFAUTO 0
#endif
static int G_LIM;
static int LFSH;
static int LFD;
static const u32 *XD[KG_MAXK];
static u32 *OUT;
static u64 *AB, *ABtop;
// ===== v2 PACKED EVENT =====================================================
// v = [KA:20][TY:1][KB:20][ID:20] (bits 43..62, 42, 22..41, 0..19)
// KA = the compare key for THIS level (dim D+1), KB = the key for the NEXT
// level (dim D+2), carried so the cross needs no re-key gather.
// A plain u64 compare gives (KA, TY, KB, ID) -- KA primary, TY breaks equal
// KA with query(TY=0) before insert(TY=1) = the strict-inequality rule.
// Requires id < 2^20 and every coordinate < 2^20 (true: n = 1e6 < 2^20).
#define E_ID(v) ((u32)((v) & 0xFFFFFu))
#define E_KB(v) ((u32)(((v) >> 22) & 0xFFFFFu))
#define E_TY(v) ((u32)(((v) >> 42) & 1u))
#define E_KA(v) ((u32)((v) >> 43))
static inline u64 mk2(u32 ka, u32 ty, u32 kb, u32 id) {
return ((u64)ka << 43) | ((u64)ty << 42) | ((u64)kb << 22) | (u64)id;
}
static inline int eid(u64 v) { return (int)(v & 0x7FFFFFFFu); }
static inline int lfbucket(u64 v) { return (int)(((u32)(v >> 32)) >> LFSH); }
static inline int eq_(u64 v) { return (int)((v >> 31) & 1); }
static inline int keep_test(int takeA, int role) { return 1 - (takeA ^ role); }
static inline u64 mk(u32 key, int q, int id) {
return ((u64)key << 32) | ((u64)(1 - q) << 31) | (u64)id;
}
// resolve a fusion-level cross: events carry the last dim (K-1) coordinate in bits 32..63
// and are ordered by dim K-2; a left-insert before a right-query with a strictly smaller
// last-dim value is a hit.
static void ctr_solve(u64 *cross, int cx, u32 *dirt) {
int nd = 0;
for (int i = 0; i < cx; i++) {
#if MF_CTRPF > 0
if (i + MF_CTRPF < cx) {
u32 vf = E_KB(cross[i + MF_CTRPF]);
__asm__ __volatile__("prefetchw %0" :: "m"(*(const char *)(&CT0[vf]))); /* [PFCT] CT1/CT2 live in L1; only CT0 (1 MB) needs the lead */
}
#endif
u64 v = cross[i];
u32 val = E_KB(v); // At the fused level dim K-1 is already in KB; consume it directly.
if (E_TY(v)) { ctr_ins(val); dirt[nd++] = val; }
else OUT[E_ID(v)] += ctr_qry(val);
}
for (int i = 0; i < nd; i++) {
#if MF_CTRPF > 0
if (i + MF_CTRPF < nd) {
u32 vf = dirt[i + MF_CTRPF];
__asm__ __volatile__("prefetchw %0" :: "m"(*(const char *)(&CT0[vf])));
}
#endif
ctr_clr(dirt[i]);
}
ctr_reset_hi();
}
// small base: compact insert list + SIMD comparison, then insertion sort by the key
static const u32 VMASK[8][8] = {
{0,0,0,0,0,0,0,0},
{~0u,0,0,0,0,0,0,0},
{~0u,~0u,0,0,0,0,0,0},
{~0u,~0u,~0u,0,0,0,0,0},
{~0u,~0u,~0u,~0u,0,0,0,0},
{~0u,~0u,~0u,~0u,~0u,0,0,0},
{~0u,~0u,~0u,~0u,~0u,~0u,0,0},
{~0u,~0u,~0u,~0u,~0u,~0u,~0u,0}};
// [LDU2] one 32-byte unaligned load; gcc 9.3 (judge) otherwise splits a 256-bit
// load whose alignment it cannot prove into vmovdqu xmm + vinserti128 (2 uops).
static inline __m256i ldu256(const void *p) {
__m256i v;
__asm__("vmovdqu %1, %0" : "=x"(v) : "m"(*(const __m256i *)p));
return v;
}
static inline u32 hsum256(__m256i v) {
__m128i t = _mm_add_epi32(_mm256_castsi256_si128(v), _mm256_extracti128_si256(v, 1));
t = _mm_add_epi32(t, _mm_shuffle_epi32(t, _MM_SHUFFLE(1, 0, 3, 2)));
t = _mm_add_epi32(t, _mm_shuffle_epi32(t, _MM_SHUFFLE(2, 3, 0, 1)));
return (u32)_mm_cvtsi128_si32(t);
}
template<int ND>
static void base_case_t(u64 *seq, int m, int d, u64 *out, int needOut) {
const int nd = ND;
/* [LSETUP-BSEL] one buffer, two 7-slot side blocks: the insert block is read at slots
0..4 (its slots 5/6 are write-only), the query block is read at all 7 slots. The
setup loop below picks {block base + running index} with one cmov, so an event's five
shared fields are stored ONCE instead of once per side. */
__attribute__((aligned(32)))
u32 LEAFB[14 * (KG_BASE + 8)];
const int LS = KG_BASE + 8;
const u32 *IK = LEAFB, *IC0 = LEAFB + 1 * LS, *IC1 = LEAFB + 2 * LS, *IC2 = LEAFB + 3 * LS,
*IC3 = LEAFB + 4 * LS;
const u32 *QK = LEAFB + 7 * LS, *QC0 = LEAFB + 8 * LS, *QC1 = LEAFB + 9 * LS,
*QC2 = LEAFB + 10 * LS, *QC3 = LEAFB + 11 * LS, *QID = LEAFB + 12 * LS,
*QN = LEAFB + 13 * LS;
u32 *pi = LEAFB, *pq = LEAFB + 7 * LS;
const u32 *X1 = nd > 1 ? XD[d + 3] : 0, *X2 = nd > 2 ? XD[d + 4] : 0,
*X3 = nd > 3 ? XD[d + 5] : 0;
int ni = 0, nq = 0;
for (int t = 0; t < m; t++) {
#if MF_LEAFLP > 0
if (t + MF_LEAFLP < m) {
int idf = (int)E_ID(seq[t + MF_LEAFLP]);
if (nd > 1) __builtin_prefetch(&X1[idf], 0, 1);
if (nd > 2) __builtin_prefetch(&X2[idf], 0, 1);
if (nd > 3) __builtin_prefetch(&X3[idf], 0, 1);
}
#endif
u64 v = seq[t];
int id = (int)E_ID(v);
u32 k = E_KA(v);
u32 c0 = 0, c1 = 0, c2 = 0, c3 = 0;
if (nd > 0) c0 = E_KB(v); // dim d+2 is IN the event -- no gather
if (nd > 1) c1 = X1[id];
if (nd > 2) c2 = X2[id];
if (nd > 3) c3 = X3[id];
int isins = (int)E_TY(v);
/* [LSETUP-BSEL] branchless side select (one cmov): exactly one side is written.
The `nd >` guards are compile-time, so a dimension the leaf never reads costs
no store at all (same dead-store elimination the two-array form enjoyed). */
u32 *dst = isins ? pi : pq;
dst[0] = k;
if (nd > 0) dst[LS] = c0;
if (nd > 1) dst[2 * LS] = c1;
if (nd > 2) dst[3 * LS] = c2;
if (nd > 3) dst[4 * LS] = c3;
dst[5 * LS] = (u32)id; dst[6 * LS] = (u32)ni;
pi += isins; pq += 1 - isins; ni += isins; nq += 1 - isins;
}
#if MF_LEAFG >= 2
/* c18/4-query group: one insert-block load feeds 4 chains */
#define MIN4(a0,a1,a2,a3) ((((a0) < (a1) ? (a0) : (a1))) < (((a2) < (a3) ? (a2) : (a3))) ? (((a0) < (a1) ? (a0) : (a1))) : (((a2) < (a3) ? (a2) : (a3))))
// The rolling hints begin at query 4*PFL, so prime the uncovered prefix.
#if PFL > 0
const int prime_end = nq < 4 * PFL ? nq : 4 * PFL;
for (int p = 0; p < prime_end; ++p)
__asm__ __volatile__("prefetchw %0" :: "m"(*(const char *)(&OUT[QID[p]])));
#endif
int q = 0;
for (; q + 4 <= nq; q += 4) {
#if PFL > 0
if (q + 4 * PFL + 3 < nq) {
__asm__ __volatile__("prefetchw %0" ::"m"(*(const char *)(&OUT[QID[q + 4 * PFL + 0]])));
__asm__ __volatile__("prefetchw %0" ::"m"(*(const char *)(&OUT[QID[q + 4 * PFL + 1]])));
__asm__ __volatile__("prefetchw %0" ::"m"(*(const char *)(&OUT[QID[q + 4 * PFL + 2]])));
__asm__ __volatile__("prefetchw %0" ::"m"(*(const char *)(&OUT[QID[q + 4 * PFL + 3]])));
}
#endif
const int n = (int)QN[q];
const int nA = (int)QN[q], nB = (int)QN[q + 1];
__m256i kvA = _mm256_set1_epi32((int)(QK[q]) - 1), kvB = _mm256_set1_epi32((int)(QK[q + 1]) - 1);
__m256i v0A = _mm256_set1_epi32((int)(QC0[q]) - 1), v0B = _mm256_set1_epi32((int)(QC0[q + 1]) - 1);
__m256i v1A = _mm256_set1_epi32((int)(QC1[q]) - 1), v1B = _mm256_set1_epi32((int)(QC1[q + 1]) - 1);
__m256i v2A = _mm256_set1_epi32((int)(QC2[q]) - 1), v2B = _mm256_set1_epi32((int)(QC2[q + 1]) - 1);
__m256i v3A = _mm256_set1_epi32((int)(QC3[q]) - 1), v3B = _mm256_set1_epi32((int)(QC3[q + 1]) - 1);
__m256i accA = _mm256_setzero_si256(), accB = _mm256_setzero_si256();
const int nC = (int)QN[q + 2], nD = (int)QN[q + 3];
__m256i kvC = _mm256_set1_epi32((int)(QK[q + 2]) - 1), kvD = _mm256_set1_epi32((int)(QK[q + 3]) - 1);
__m256i v0C = _mm256_set1_epi32((int)(QC0[q + 2]) - 1), v0D = _mm256_set1_epi32((int)(QC0[q + 3]) - 1);
__m256i v1C = _mm256_set1_epi32((int)(QC1[q + 2]) - 1), v1D = _mm256_set1_epi32((int)(QC1[q + 3]) - 1);
__m256i v2C = _mm256_set1_epi32((int)(QC2[q + 2]) - 1), v2D = _mm256_set1_epi32((int)(QC2[q + 3]) - 1);
__m256i v3C = _mm256_set1_epi32((int)(QC3[q + 2]) - 1), v3D = _mm256_set1_epi32((int)(QC3[q + 3]) - 1);
__m256i accC = _mm256_setzero_si256(), accD = _mm256_setzero_si256();
int j = 0;
if (nd >= 3) {
for (; j + 8 <= n; j += 8) {
__m256i IKv = _mm256_load_si256((const __m256i *)(IK + j));
__m256i C0v = _mm256_load_si256((const __m256i *)(IC0 + j));
__m256i C1v = _mm256_load_si256((const __m256i *)(IC1 + j));
__m256i C2v = _mm256_load_si256((const __m256i *)(IC2 + j));
__m256i mA = _mm256_or_si256(_mm256_cmpgt_epi32(IKv, kvA), _mm256_cmpgt_epi32(C0v, v0A));
__m256i mC = _mm256_or_si256(_mm256_cmpgt_epi32(IKv, kvC), _mm256_cmpgt_epi32(C0v, v0C));
__m256i mB = _mm256_or_si256(_mm256_cmpgt_epi32(IKv, kvB), _mm256_cmpgt_epi32(C0v, v0B));
__m256i mD = _mm256_or_si256(_mm256_cmpgt_epi32(IKv, kvD), _mm256_cmpgt_epi32(C0v, v0D));
mA = _mm256_or_si256(mA, _mm256_cmpgt_epi32(C1v, v1A));
mC = _mm256_or_si256(mC, _mm256_cmpgt_epi32(C1v, v1C));
mB = _mm256_or_si256(mB, _mm256_cmpgt_epi32(C1v, v1B));
mD = _mm256_or_si256(mD, _mm256_cmpgt_epi32(C1v, v1D));
mA = _mm256_or_si256(mA, _mm256_cmpgt_epi32(C2v, v2A));
mC = _mm256_or_si256(mC, _mm256_cmpgt_epi32(C2v, v2C));
mB = _mm256_or_si256(mB, _mm256_cmpgt_epi32(C2v, v2B));
mD = _mm256_or_si256(mD, _mm256_cmpgt_epi32(C2v, v2D));
if (nd > 3) { /* m161i key 3 */
__m256i C3v = _mm256_load_si256((const __m256i *)(IC3 + j));
mA = _mm256_or_si256(mA, _mm256_cmpgt_epi32(C3v, v3A));
mC = _mm256_or_si256(mC, _mm256_cmpgt_epi32(C3v, v3C));
mB = _mm256_or_si256(mB, _mm256_cmpgt_epi32(C3v, v3B));
mD = _mm256_or_si256(mD, _mm256_cmpgt_epi32(C3v, v3D));
}
accA = _mm256_add_epi32(accA, mA);
accC = _mm256_add_epi32(accC, mC);
accB = _mm256_add_epi32(accB, mB);
accD = _mm256_add_epi32(accD, mD);
}
} else {
for (; j + 8 <= n; j += 8) {
__m256i IKv = _mm256_load_si256((const __m256i *)(IK + j));
__m256i mA = _mm256_cmpgt_epi32(IKv, kvA);
__m256i mC = _mm256_cmpgt_epi32(IKv, kvC);
__m256i mB = _mm256_cmpgt_epi32(IKv, kvB);
__m256i mD = _mm256_cmpgt_epi32(IKv, kvD);
if (nd > 0) {
__m256i C0v = _mm256_load_si256((const __m256i *)(IC0 + j));
mA = _mm256_or_si256(mA, _mm256_cmpgt_epi32(C0v, v0A));
mC = _mm256_or_si256(mC, _mm256_cmpgt_epi32(C0v, v0C));
mB = _mm256_or_si256(mB, _mm256_cmpgt_epi32(C0v, v0B));
mD = _mm256_or_si256(mD, _mm256_cmpgt_epi32(C0v, v0D));
}
if (nd > 1) {
__m256i C1v = _mm256_load_si256((const __m256i *)(IC1 + j));
mA = _mm256_or_si256(mA, _mm256_cmpgt_epi32(C1v, v1A));
mC = _mm256_or_si256(mC, _mm256_cmpgt_epi32(C1v, v1C));
mB = _mm256_or_si256(mB, _mm256_cmpgt_epi32(C1v, v1B));
mD = _mm256_or_si256(mD, _mm256_cmpgt_epi32(C1v, v1D));
}
accA = _mm256_add_epi32(accA, mA);
accC = _mm256_add_epi32(accC, mC);
accB = _mm256_add_epi32(accB, mB);
accD = _mm256_add_epi32(accD, mD);
}
}
if(nD-j<8) {
if(nD>j) {
__m256i iv=_mm256_load_si256((const __m256i*)(IK+j));
__m256i mA=_mm256_cmpgt_epi32(iv,kvA);
__m256i mB=_mm256_cmpgt_epi32(iv,kvB);
__m256i mC=_mm256_cmpgt_epi32(iv,kvC);
__m256i mD=_mm256_cmpgt_epi32(iv,kvD);
if(nd>0) {
__m256i cv=_mm256_load_si256((const __m256i*)(IC0+j));
mA=_mm256_or_si256(mA,_mm256_cmpgt_epi32(cv,v0A));
mB=_mm256_or_si256(mB,_mm256_cmpgt_epi32(cv,v0B));
mC=_mm256_or_si256(mC,_mm256_cmpgt_epi32(cv,v0C));
mD=_mm256_or_si256(mD,_mm256_cmpgt_epi32(cv,v0D));
}
if(nd>1) {
__m256i cv=_mm256_load_si256((const __m256i*)(IC1+j));
mA=_mm256_or_si256(mA,_mm256_cmpgt_epi32(cv,v1A));
mB=_mm256_or_si256(mB,_mm256_cmpgt_epi32(cv,v1B));
mC=_mm256_or_si256(mC,_mm256_cmpgt_epi32(cv,v1C));
mD=_mm256_or_si256(mD,_mm256_cmpgt_epi32(cv,v1D));
}
if(nd>2) {
__m256i cv=_mm256_load_si256((const __m256i*)(IC2+j));
mA=_mm256_or_si256(mA,_mm256_cmpgt_epi32(cv,v2A));
mB=_mm256_or_si256(mB,_mm256_cmpgt_epi32(cv,v2B));
mC=_mm256_or_si256(mC,_mm256_cmpgt_epi32(cv,v2C));
mD=_mm256_or_si256(mD,_mm256_cmpgt_epi32(cv,v2D));
}
if(nd>3) {
__m256i cv=_mm256_load_si256((const __m256i*)(IC3+j));
mA=_mm256_or_si256(mA,_mm256_cmpgt_epi32(cv,v3A));
mB=_mm256_or_si256(mB,_mm256_cmpgt_epi32(cv,v3B));
mC=_mm256_or_si256(mC,_mm256_cmpgt_epi32(cv,v3C));
mD=_mm256_or_si256(mD,_mm256_cmpgt_epi32(cv,v3D));
}
accA=_mm256_add_epi32(accA,_mm256_and_si256(mA,_mm256_loadu_si256((const __m256i*)VMASK[nA-j])));
accB=_mm256_add_epi32(accB,_mm256_and_si256(mB,_mm256_loadu_si256((const __m256i*)VMASK[nB-j])));
accC=_mm256_add_epi32(accC,_mm256_and_si256(mC,_mm256_loadu_si256((const __m256i*)VMASK[nC-j])));
accD=_mm256_add_epi32(accD,_mm256_and_si256(mD,_mm256_loadu_si256((const __m256i*)VMASK[nD-j])));
}
OUT[QID[q+0]]+=(u32)((int)nA+(int)hsum256(accA));
OUT[QID[q+1]]+=(u32)((int)nB+(int)hsum256(accB));
OUT[QID[q+2]]+=(u32)((int)nC+(int)hsum256(accC));
OUT[QID[q+3]]+=(u32)((int)nD+(int)hsum256(accD));
} else {
{
int jj = j;
__m256i acc = accA;
if (jj < nA) {
int n = nA;
__m256i msk = _mm256_cmpgt_epi32(_mm256_load_si256((const __m256i *)(IK + jj)), kvA);
if (nd > 0) msk = _mm256_or_si256(msk, _mm256_cmpgt_epi32(_mm256_load_si256((const __m256i *)(IC0 + jj)), v0A));
if (nd > 1) msk = _mm256_or_si256(msk, _mm256_cmpgt_epi32(_mm256_load_si256((const __m256i *)(IC1 + jj)), v1A));
if (nd > 2) msk = _mm256_or_si256(msk, _mm256_cmpgt_epi32(_mm256_load_si256((const __m256i *)(IC2 + jj)), v2A));
if (nd > 3) msk = _mm256_or_si256(msk, _mm256_cmpgt_epi32(_mm256_load_si256((const __m256i *)(IC3 + jj)), v3A));
msk = _mm256_and_si256(msk, _mm256_loadu_si256((const __m256i *)VMASK[n - jj]));
acc = _mm256_add_epi32(acc, msk);
}
OUT[QID[q]] += (u32)((int)nA + (int)hsum256(acc));
}
{
int jj = j;
__m256i acc = accB;
for (; jj + 8 <= nB; jj += 8) {
__m256i msk = _mm256_cmpgt_epi32(_mm256_load_si256((const __m256i *)(IK + jj)), kvB);
if (nd > 0) msk = _mm256_or_si256(msk, _mm256_cmpgt_epi32(_mm256_load_si256((const __m256i *)(IC0 + jj)), v0B));
if (nd > 1) msk = _mm256_or_si256(msk, _mm256_cmpgt_epi32(_mm256_load_si256((const __m256i *)(IC1 + jj)), v1B));
if (nd > 2) msk = _mm256_or_si256(msk, _mm256_cmpgt_epi32(_mm256_load_si256((const __m256i *)(IC2 + jj)), v2B));
if (nd > 3) msk = _mm256_or_si256(msk, _mm256_cmpgt_epi32(_mm256_load_si256((const __m256i *)(IC3 + jj)), v3B));
acc = _mm256_add_epi32(acc, msk);
}
if (jj < nB) {
int n = nB;
__m256i msk = _mm256_cmpgt_epi32(_mm256_load_si256((const __m256i *)(IK + jj)), kvB);
if (nd > 0) msk = _mm256_or_si256(msk, _mm256_cmpgt_epi32(_mm256_load_si256((const __m256i *)(IC0 + jj)), v0B));
if (nd > 1) msk = _mm256_or_si256(msk, _mm256_cmpgt_epi32(_mm256_load_si256((const __m256i *)(IC1 + jj)), v1B));
if (nd > 2) msk = _mm256_or_si256(msk, _mm256_cmpgt_epi32(_mm256_load_si256((const __m256i *)(IC2 + jj)), v2B));
if (nd > 3) msk = _mm256_or_si256(msk, _mm256_cmpgt_epi32(_mm256_load_si256((const __m256i *)(IC3 + jj)), v3B));
msk = _mm256_and_si256(msk, _mm256_loadu_si256((const __m256i *)VMASK[n - jj]));
acc = _mm256_add_epi32(acc, msk);
}
OUT[QID[q + 1]] += (u32)((int)nB + (int)hsum256(acc));
}
{
int jj = j;
__m256i acc = accC;
for (; jj + 8 <= nC; jj += 8) {
__m256i msk = _mm256_cmpgt_epi32(_mm256_load_si256((const __m256i *)(IK + jj)), kvC);
if (nd > 0) msk = _mm256_or_si256(msk, _mm256_cmpgt_epi32(_mm256_load_si256((const __m256i *)(IC0 + jj)), v0C));
if (nd > 1) msk = _mm256_or_si256(msk, _mm256_cmpgt_epi32(_mm256_load_si256((const __m256i *)(IC1 + jj)), v1C));
if (nd > 2) msk = _mm256_or_si256(msk, _mm256_cmpgt_epi32(_mm256_load_si256((const __m256i *)(IC2 + jj)), v2C));
if (nd > 3) msk = _mm256_or_si256(msk, _mm256_cmpgt_epi32(_mm256_load_si256((const __m256i *)(IC3 + jj)), v3C));
acc = _mm256_add_epi32(acc, msk);
}
if (jj < nC) {
int n = nC;
__m256i msk = _mm256_cmpgt_epi32(_mm256_load_si256((const __m256i *)(IK + jj)), kvC);
if (nd > 0) msk = _mm256_or_si256(msk, _mm256_cmpgt_epi32(_mm256_load_si256((const __m256i *)(IC0 + jj)), v0C));
if (nd > 1) msk = _mm256_or_si256(msk, _mm256_cmpgt_epi32(_mm256_load_si256((const __m256i *)(IC1 + jj)), v1C));
if (nd > 2) msk = _mm256_or_si256(msk, _mm256_cmpgt_epi32(_mm256_load_si256((const __m256i *)(IC2 + jj)), v2C));
if (nd > 3) msk = _mm256_or_si256(msk, _mm256_cmpgt_epi32(_mm256_load_si256((const __m256i *)(IC3 + jj)), v3C));
msk = _mm256_and_si256(msk, _mm256_loadu_si256((const __m256i *)VMASK[n - jj]));
acc = _mm256_add_epi32(acc, msk);
}
OUT[QID[q + 2]] += (u32)((int)nC + (int)hsum256(acc));
}
{
int jj = j;
__m256i acc = accD;
for (; jj + 8 <= nD; jj += 8) {
__m256i msk = _mm256_cmpgt_epi32(_mm256_load_si256((const __m256i *)(IK + jj)), kvD);
if (nd > 0) msk = _mm256_or_si256(msk, _mm256_cmpgt_epi32(_mm256_load_si256((const __m256i *)(IC0 + jj)), v0D));
if (nd > 1) msk = _mm256_or_si256(msk, _mm256_cmpgt_epi32(_mm256_load_si256((const __m256i *)(IC1 + jj)), v1D));
if (nd > 2) msk = _mm256_or_si256(msk, _mm256_cmpgt_epi32(_mm256_load_si256((const __m256i *)(IC2 + jj)), v2D));
if (nd > 3) msk = _mm256_or_si256(msk, _mm256_cmpgt_epi32(_mm256_load_si256((const __m256i *)(IC3 + jj)), v3D));
acc = _mm256_add_epi32(acc, msk);
}
if (jj < nD) {
int n = nD;
__m256i msk = _mm256_cmpgt_epi32(_mm256_load_si256((const __m256i *)(IK + jj)), kvD);
if (nd > 0) msk = _mm256_or_si256(msk, _mm256_cmpgt_epi32(_mm256_load_si256((const __m256i *)(IC0 + jj)), v0D));
if (nd > 1) msk = _mm256_or_si256(msk, _mm256_cmpgt_epi32(_mm256_load_si256((const __m256i *)(IC1 + jj)), v1D));
if (nd > 2) msk = _mm256_or_si256(msk, _mm256_cmpgt_epi32(_mm256_load_si256((const __m256i *)(IC2 + jj)), v2D));
if (nd > 3) msk = _mm256_or_si256(msk, _mm256_cmpgt_epi32(_mm256_load_si256((const __m256i *)(IC3 + jj)), v3D));
msk = _mm256_and_si256(msk, _mm256_loadu_si256((const __m256i *)VMASK[n - jj]));
acc = _mm256_add_epi32(acc, msk);
}
OUT[QID[q + 3]] += (u32)((int)nD + (int)hsum256(acc));
}
}
}
for (; q + 2 <= nq; q += 2) {
const int n = (int)QN[q];
const int nA = (int)QN[q], nB = (int)QN[q + 1];
__m256i kvA = _mm256_set1_epi32((int)(QK[q]) - 1), kvB = _mm256_set1_epi32((int)(QK[q + 1]) - 1);
__m256i v0A = _mm256_set1_epi32((int)(QC0[q]) - 1), v0B = _mm256_set1_epi32((int)(QC0[q + 1]) - 1);
__m256i v1A = _mm256_set1_epi32((int)(QC1[q]) - 1), v1B = _mm256_set1_epi32((int)(QC1[q + 1]) - 1);
__m256i v2A = _mm256_set1_epi32((int)(QC2[q]) - 1), v2B = _mm256_set1_epi32((int)(QC2[q + 1]) - 1);
__m256i v3A = _mm256_set1_epi32((int)(QC3[q]) - 1), v3B = _mm256_set1_epi32((int)(QC3[q + 1]) - 1);
__m256i accA = _mm256_setzero_si256(), accB = _mm256_setzero_si256();
int j = 0;
if (nd >= 3) {
for (; j + 8 <= n; j += 8) {
__m256i IKv = _mm256_load_si256((const __m256i *)(IK + j));
__m256i C0v = _mm256_load_si256((const __m256i *)(IC0 + j));
__m256i C1v = _mm256_load_si256((const __m256i *)(IC1 + j));
__m256i C2v = _mm256_load_si256((const __m256i *)(IC2 + j));
__m256i mA = _mm256_or_si256(_mm256_cmpgt_epi32(IKv, kvA), _mm256_cmpgt_epi32(C0v, v0A));
__m256i mB = _mm256_or_si256(_mm256_cmpgt_epi32(IKv, kvB), _mm256_cmpgt_epi32(C0v, v0B));
mA = _mm256_or_si256(mA, _mm256_cmpgt_epi32(C1v, v1A));
mB = _mm256_or_si256(mB, _mm256_cmpgt_epi32(C1v, v1B));
mA = _mm256_or_si256(mA, _mm256_cmpgt_epi32(C2v, v2A));
mB = _mm256_or_si256(mB, _mm256_cmpgt_epi32(C2v, v2B));
if (nd > 3) { /* m161i key 3 */
__m256i C3v = _mm256_load_si256((const __m256i *)(IC3 + j));
mA = _mm256_or_si256(mA, _mm256_cmpgt_epi32(C3v, v3A));
mB = _mm256_or_si256(mB, _mm256_cmpgt_epi32(C3v, v3B));
}
accA = _mm256_add_epi32(accA, mA);
accB = _mm256_add_epi32(accB, mB);
}
} else {
for (; j + 8 <= n; j += 8) {
__m256i IKv = _mm256_load_si256((const __m256i *)(IK + j));
__m256i mA = _mm256_cmpgt_epi32(IKv, kvA);
__m256i mB = _mm256_cmpgt_epi32(IKv, kvB);
if (nd > 0) {
__m256i C0v = _mm256_load_si256((const __m256i *)(IC0 + j));
mA = _mm256_or_si256(mA, _mm256_cmpgt_epi32(C0v, v0A));
mB = _mm256_or_si256(mB, _mm256_cmpgt_epi32(C0v, v0B));
}
if (nd > 1) {
__m256i C1v = _mm256_load_si256((const __m256i *)(IC1 + j));
mA = _mm256_or_si256(mA, _mm256_cmpgt_epi32(C1v, v1A));
mB = _mm256_or_si256(mB, _mm256_cmpgt_epi32(C1v, v1B));
}
accA = _mm256_add_epi32(accA, mA);
accB = _mm256_add_epi32(accB, mB);
}
}
if(nB-j<8){
const __m256i ik=_mm256_load_si256((const __m256i*)(IK+j));
__m256i ma=_mm256_cmpgt_epi32(ik,kvA),mb=_mm256_cmpgt_epi32(ik,kvB);
if(nd>0){const __m256i v=_mm256_load_si256((const __m256i*)(IC0+j));
ma=_mm256_or_si256(ma,_mm256_cmpgt_epi32(v,v0A));
mb=_mm256_or_si256(mb,_mm256_cmpgt_epi32(v,v0B));}
if(nd>1){const __m256i v=_mm256_load_si256((const __m256i*)(IC1+j));
ma=_mm256_or_si256(ma,_mm256_cmpgt_epi32(v,v1A));
mb=_mm256_or_si256(mb,_mm256_cmpgt_epi32(v,v1B));}
if(nd>2){const __m256i v=_mm256_load_si256((const __m256i*)(IC2+j));
ma=_mm256_or_si256(ma,_mm256_cmpgt_epi32(v,v2A));
mb=_mm256_or_si256(mb,_mm256_cmpgt_epi32(v,v2B));}
if(nd>3){const __m256i v=_mm256_load_si256((const __m256i*)(IC3+j));
ma=_mm256_or_si256(ma,_mm256_cmpgt_epi32(v,v3A));
mb=_mm256_or_si256(mb,_mm256_cmpgt_epi32(v,v3B));}
accA=_mm256_add_epi32(accA,_mm256_and_si256(ma,_mm256_loadu_si256((const __m256i*)VMASK[nA-j])));
accB=_mm256_add_epi32(accB,_mm256_and_si256(mb,_mm256_loadu_si256((const __m256i*)VMASK[nB-j])));
OUT[QID[q]]+=(u32)((int)nA+(int)hsum256(accA));
OUT[QID[q+1]]+=(u32)((int)nB+(int)hsum256(accB));
}else{
// per-query tails: each member finishes [j, QN[.]) on its own
{
int jj = j;
__m256i acc = accA;
if (jj < nA) {
int n = nA;
__m256i msk = _mm256_cmpgt_epi32(_mm256_load_si256((const __m256i *)(IK + jj)), kvA);
if (nd > 0) msk = _mm256_or_si256(msk, _mm256_cmpgt_epi32(_mm256_load_si256((const __m256i *)(IC0 + jj)), v0A));
if (nd > 1) msk = _mm256_or_si256(msk, _mm256_cmpgt_epi32(_mm256_load_si256((const __m256i *)(IC1 + jj)), v1A));
if (nd > 2) msk = _mm256_or_si256(msk, _mm256_cmpgt_epi32(_mm256_load_si256((const __m256i *)(IC2 + jj)), v2A));
if (nd > 3) msk = _mm256_or_si256(msk, _mm256_cmpgt_epi32(_mm256_load_si256((const __m256i *)(IC3 + jj)), v3A));
msk = _mm256_and_si256(msk, _mm256_loadu_si256((const __m256i *)VMASK[n - jj]));
acc = _mm256_add_epi32(acc, msk);
}
OUT[QID[q]] += (u32)((int)nA + (int)hsum256(acc));
}
{
int jj = j;
__m256i acc = accB;
for (; jj + 8 <= nB; jj += 8) {
__m256i msk = _mm256_cmpgt_epi32(_mm256_load_si256((const __m256i *)(IK + jj)), kvB);
if (nd > 0) msk = _mm256_or_si256(msk, _mm256_cmpgt_epi32(_mm256_load_si256((const __m256i *)(IC0 + jj)), v0B));
if (nd > 1) msk = _mm256_or_si256(msk, _mm256_cmpgt_epi32(_mm256_load_si256((const __m256i *)(IC1 + jj)), v1B));
if (nd > 2) msk = _mm256_or_si256(msk, _mm256_cmpgt_epi32(_mm256_load_si256((const __m256i *)(IC2 + jj)), v2B));
if (nd > 3) msk = _mm256_or_si256(msk, _mm256_cmpgt_epi32(_mm256_load_si256((const __m256i *)(IC3 + jj)), v3B));
acc = _mm256_add_epi32(acc, msk);
}
if (jj < nB) {
int n = nB;
__m256i msk = _mm256_cmpgt_epi32(_mm256_load_si256((const __m256i *)(IK + jj)), kvB);
if (nd > 0) msk = _mm256_or_si256(msk, _mm256_cmpgt_epi32(_mm256_load_si256((const __m256i *)(IC0 + jj)), v0B));
if (nd > 1) msk = _mm256_or_si256(msk, _mm256_cmpgt_epi32(_mm256_load_si256((const __m256i *)(IC1 + jj)), v1B));
if (nd > 2) msk = _mm256_or_si256(msk, _mm256_cmpgt_epi32(_mm256_load_si256((const __m256i *)(IC2 + jj)), v2B));
if (nd > 3) msk = _mm256_or_si256(msk, _mm256_cmpgt_epi32(_mm256_load_si256((const __m256i *)(IC3 + jj)), v3B));
msk = _mm256_and_si256(msk, _mm256_loadu_si256((const __m256i *)VMASK[n - jj]));
acc = _mm256_add_epi32(acc, msk);
}
OUT[QID[q + 1]] += (u32)((int)nB + (int)hsum256(acc));
}
}
}
#endif
for (; q < nq; q++) {
const int n = (int)QN[q];
__m256i kv = _mm256_set1_epi32((int)(QK[q]) - 1);
__m256i v0 = _mm256_set1_epi32((int)(QC0[q]) - 1);
__m256i v1 = _mm256_set1_epi32((int)(QC1[q]) - 1);
__m256i v2 = _mm256_set1_epi32((int)(QC2[q]) - 1);
__m256i v3 = _mm256_set1_epi32((int)(QC3[q]) - 1);
__m256i acc = _mm256_setzero_si256();
int j = 0;
switch (nd) {
case 0:
for (; j + 8 <= n; j += 8)
acc = _mm256_add_epi32(acc, _mm256_cmpgt_epi32(_mm256_load_si256((const __m256i *)(IK + j)), kv));
break;
case 1:
for (; j + 8 <= n; j += 8) {
__m256i msk = _mm256_cmpgt_epi32(_mm256_load_si256((const __m256i *)(IK + j)), kv);
msk = _mm256_or_si256(msk, _mm256_cmpgt_epi32(_mm256_load_si256((const __m256i *)(IC0 + j)), v0));
acc = _mm256_add_epi32(acc, msk);
}
break;
case 2:
for (; j + 8 <= n; j += 8) {
__m256i msk = _mm256_cmpgt_epi32(_mm256_load_si256((const __m256i *)(IK + j)), kv);
msk = _mm256_or_si256(msk, _mm256_cmpgt_epi32(_mm256_load_si256((const __m256i *)(IC0 + j)), v0));
msk = _mm256_or_si256(msk, _mm256_cmpgt_epi32(_mm256_load_si256((const __m256i *)(IC1 + j)), v1));
acc = _mm256_add_epi32(acc, msk);
}
break;
default:
for (; j + 8 <= n; j += 8) {
__m256i msk = _mm256_cmpgt_epi32(_mm256_load_si256((const __m256i *)(IK + j)), kv);
msk = _mm256_or_si256(msk, _mm256_cmpgt_epi32(_mm256_load_si256((const __m256i *)(IC0 + j)), v0));
msk = _mm256_or_si256(msk, _mm256_cmpgt_epi32(_mm256_load_si256((const __m256i *)(IC1 + j)), v1));
msk = _mm256_or_si256(msk, _mm256_cmpgt_epi32(_mm256_load_si256((const __m256i *)(IC2 + j)), v2));
if (nd > 3) msk = _mm256_or_si256(msk, _mm256_cmpgt_epi32(_mm256_load_si256((const __m256i *)(IC3 + j)), v3));
acc = _mm256_add_epi32(acc, msk);
}
break;
}
if (j < n) { // partial block, masked by a table lookup
__m256i msk = _mm256_cmpgt_epi32(_mm256_load_si256((const __m256i *)(IK + j)), kv);
if (nd > 0) msk = _mm256_or_si256(msk, _mm256_cmpgt_epi32(_mm256_load_si256((const __m256i *)(IC0 + j)), v0));
if (nd > 1) msk = _mm256_or_si256(msk, _mm256_cmpgt_epi32(_mm256_load_si256((const __m256i *)(IC1 + j)), v1));
if (nd > 2) msk = _mm256_or_si256(msk, _mm256_cmpgt_epi32(_mm256_load_si256((const __m256i *)(IC2 + j)), v2));
if (nd > 3) msk = _mm256_or_si256(msk, _mm256_cmpgt_epi32(_mm256_load_si256((const __m256i *)(IC3 + j)), v3));
msk = _mm256_and_si256(msk, _mm256_loadu_si256((const __m256i *)VMASK[n - j]));
acc = _mm256_add_epi32(acc, msk);
}
u32 c = hsum256(acc);
OUT[QID[q]] += (u32)((int)n + (int)c);
}
if (!needOut) return;
#if LEAFNB
{
const int NB = (LFAUTO && m <= LEAFNB) ? (m < 8 ? 8 : m) : LEAFNB;
const int LB = (G_LIM < NB) ? G_LIM : NB; // used-bucket bound
/* [SORTB] one extra leading slot so that cnt[-1] == 0 is a legal read: the
bucket-b discovery pass below can then vectorise over every bucket. */
alignas(32) unsigned short cntb[LEAFNB + 32];
unsigned short *cnt = cntb + 15;
u32 multib[(LEAFNB+31)/32];
multib[(LB-2)>>5]=0;
cnt[-1] = 0;
for (int b = 0; b < LB; b++) cnt[b] = 0;
for (int t = 0; t < m; t++) cnt[(int)(E_KA(seq[t]) >> (LFSH + LFD)) + 1]++;
{int b=1;__m256i carry=_mm256_setzero_si256();
const __m256i last=_mm256_setr_epi8(14,15,14,15,14,15,14,15,14,15,14,15,14,15,14,15,14,15,14,15,14,15,14,15,14,15,14,15,14,15,14,15);
for(;b+16<=LB;b+=16){
__m256i v=_mm256_load_si256((const __m256i*)(cnt+b));
unsigned short mask=(unsigned short)_pext_u32((u32)_mm256_movemask_epi8(_mm256_cmpgt_epi16(v,_mm256_set1_epi16(1))),0xAAAAAAAAu);
memcpy((unsigned char*)multib+((b-1)>>3),&mask,2);
v=_mm256_add_epi16(v,_mm256_slli_si256(v,2));
v=_mm256_add_epi16(v,_mm256_slli_si256(v,4));
v=_mm256_add_epi16(v,_mm256_slli_si256(v,8));
__m256i cross=_mm256_shuffle_epi8(v,last);
v=_mm256_add_epi16(v,_mm256_permute2x128_si256(cross,cross,0x08));
__m256i total=_mm256_shuffle_epi8(v,last);
total=_mm256_permute2x128_si256(total,total,0x11);
_mm256_store_si256((__m256i*)(cnt+b),_mm256_add_epi16(v,carry));
carry=_mm256_add_epi16(carry,total);
}
u32 sum=(u32)_mm_extract_epi16(_mm256_castsi256_si128(carry),0);
if(b<LB){unsigned short mask=0;int begin=b;for(;b<LB;b++){u32 c=cnt[b];mask|=(unsigned short)((c>1)<<(b-begin));sum+=c;cnt[b]=(unsigned short)sum;}memcpy((unsigned char*)multib+((begin-1)>>3),&mask,2);}
}
for (int t = 0; t < m; t++) { u64 v = seq[t]; out[cnt[(int)(E_KA(v) >> (LFSH + LFD))]++] = v; }
/* [SORTB] buckets holding 0 or 1 events need no work, and with LEAFNB >= m the
great majority are of that kind; a 256-bit subtract/compare/movemask finds the
multi-event buckets eight at a time, so the scan loop takes no data-dependent
branch at all -- only the 1/8-odd that really hold two or more are revisited. */
{
const __m256i one1 = _mm256_set1_epi32(1);
int b = 0;
/* [SORTB3] thirty-two buckets per iteration: four vector pairs build one
32-bit mask, so the loop takes one empty-mask exit per 32 slots. */
for (; b < LB - 1; b += 32) {
unsigned mask=multib[b>>5];
while (mask) {
int k = __builtin_ctz(mask);
mask &= mask - 1;
int bb = b + k;
int lo = (int)cnt[bb - 1];
int hi = (int)cnt[bb];
if (hi - lo == 2) {
u64 a = out[lo], c = out[lo + 1];
int lt = (a < c);
out[lo] = lt ? a : c;
out[lo + 1] = lt ? c : a;
} else if (hi - lo <= 4) {
/* [CE34] fixed compare-exchange networks for three and four events */
u64 a = out[lo], b = out[lo + 1], c = out[lo + 2];
if (hi - lo == 3) {
u64 x = a, y = b; int lt = x < y; a = lt ? x : y; b = lt ? y : x;
x = b; y = c; lt = x < y; b = lt ? x : y; c = lt ? y : x;
x = a; y = b; lt = x < y; a = lt ? x : y; b = lt ? y : x;
out[lo] = a; out[lo + 1] = b; out[lo + 2] = c;
} else {
u64 d = out[lo + 3], x, y; int lt;
x = a; y = b; lt = x < y; a = lt ? x : y; b = lt ? y : x;
x = c; y = d; lt = x < y; c = lt ? x : y; d = lt ? y : x;
x = a; y = c; lt = x < y; a = lt ? x : y; c = lt ? y : x;
x = b; y = d; lt = x < y; b = lt ? x : y; d = lt ? y : x;
x = b; y = c; lt = x < y; b = lt ? x : y; c = lt ? y : x;
out[lo] = a; out[lo + 1] = b; out[lo + 2] = c; out[lo + 3] = d;
}
} else
for (int t = lo + 1; t < hi; t++) {
u64 v = out[t];
int q = t - 1;
while (q >= lo && v < out[q]) { out[q + 1] = out[q]; q--; }
out[q + 1] = v;
}
}
}
}
}
#else
for (int t = 1; t < m; t++) {
u64 v = seq[t];
int q = t - 1;
while (q >= 0 && v < seq[q]) { seq[q + 1] = seq[q]; q--; }
seq[q + 1] = v;
}
memcpy(out, seq, sizeof(u64) * (size_t)m);
#endif
}
static void base_case(u64 *seq, int m, int d, u64 *out, int needOut) {
switch (K - (d + 2)) {
case 0: base_case_t<0>(seq, m, d, out, needOut); break;
case 1: base_case_t<1>(seq, m, d, out, needOut); break;
case 2: base_case_t<2>(seq, m, d, out, needOut); break;
case 3: base_case_t<3>(seq, m, d, out, needOut); break;
case 4: base_case_t<4>(seq, m, d, out, needOut); break;
default: base_case_t<4>(seq, m, d, out, needOut); break;
}
}
// ---- ND specialisation dispatcher (the fleet's `DN` recipe) ----
static void base_case(u64 *seq, int m, int d, u64 *out, int needOut);
// ================= depth-templated solve: D and KT are compile-time =================
template <bool B> struct TB {};
template <int V> struct NCL { static const int v = (V < 0) ? 0 : ((V > 4) ? 4 : V); };
template <int KT, int D, bool NEED> static inline void solve_t(u64 *seq, int m, u64 *out);
// ---- terminal level (D == KT-1): every insert-before-query pair qualifies ----
template <int KT, int D, bool NEED>
static void solve_b(u64 *seq, int m, u64 *out, TB<true>) {
int cnt = 0;
for (int t = 0; t < m; t++) {
if (t + 48 < m) { // [R1486-OUTPFM] write-intent lookahead, 48 events
u64 vf = seq[t + 48];
__asm__ __volatile__("prefetchw %0" :: "m"(*(const char *)(&OUT[E_ID(vf)])));
}
u64 v = seq[t];
if (E_TY(v)) cnt++; // insert
else OUT[E_ID(v)] += (u32)cnt; // query
}
}
// ---- general level (D < KT-1) ----
template <int KT, int D, bool NEED>
static void solve_b(u64 *seq, int m, u64 *out, TB<false>) {
if (m <= KG_BASE) {
base_case_t<NCL< KT - (D + 2) >::v>(seq, m, D, out, NEED);
return;
}
int h = m >> 1, r = m - h;
u64 *save = ABtop;
u64 *retA = ABtop; ABtop += h+1;
u64 *retB = ABtop; ABtop += r;
solve_t<KT, D, true>(seq, h, retA);
solve_t<KT, D, true>(seq + h, r, retB);
u64 *cross = ABtop; ABtop += m + 1;
// v2: PROMOTE moves the carried KB up into the KA slot (a new level's key);
// GATHER fetches the next KB (dim D+3) -- the ONLY remaining per-level gather,
// and it exists only at D = 0 for KT = 4.
const int PROM = (D + 2 <= KT - 1);
const int GAT = (D + 3 <= KT - 1);
const u32 *XN = XD[(D + 3 <= KG_MAXK - 1) ? (D + 3) : 0];
retA[h]=~0ULL;
const u64 *pa=retA,*pb=retB,*const pe=retA+h,*const qe=retB+r;
u64 *po=out,*pc=cross;
u64 ea=*pa, eb=*pb;
while(pb<qe){
#if KG_PF
if(GAT){
if(pe-pa>KG_PF)__builtin_prefetch(XN+E_ID(pa[KG_PF]),0,1);
if(qe-pb>KG_PF)__builtin_prefetch(XN+E_ID(pb[KG_PF]),0,1);
}
#endif
const u64 ea2=pa[1], eb2=pb[1]; /* [SPIPE2] speculative: pa[1] is the */
u64 v; const u64 *pan,*pbn; u32 ka,kb; /* retA sentinel slot, pb[1] stays in-arena */
(void)pe;
__asm__("xorl %k[k0],%k[k0]\n\t"
"xorl %k[k1],%k[k1]\n\t"
"btq $42,%[ea]\n\t"
"setc %b[k0]\n\t"
"btq $42,%[eb]\n\t"
"setnc %b[k1]\n\t"
"cmpq %[eb],%[ea]\n\t"
"movq %[eb],%[v]\n\t"
"cmovb %[ea],%[v]\n\t"
"leaq 8(%[pa]),%[pan]\n\t"
"leaq 8(%[pb]),%[pbn]\n\t"
"cmovb %[pan],%[pa]\n\t"
"cmovae %[pbn],%[pb]\n\t"
"cmovb %k[k0],%k[k1]\n\t"
"cmovb %[ea2],%[ea]\n\t"
"cmovae %[eb2],%[eb]"
: [pa]"+&r"(pa),[pb]"+&r"(pb),[v]"=&r"(v),[k0]"=&r"(ka),[k1]"=&r"(kb),[pan]"=&r"(pan),[pbn]"=&r"(pbn),[ea]"+&r"(ea),[eb]"+&r"(eb)
: [ea2]"r"(ea2),[eb2]"r"(eb2):"cc");
if(NEED)*po++=v;
*pc=v;pc+=kb;
}
while(pa<pe){u64 v=*pa++;if(NEED)*po++=v;if(E_TY(v))*pc++=v;}
int cx=(int)(pc-cross);
if (GAT) { // ----- C1: cross re-key, second pass -----
int j=0;
const __m256i idmask=_mm256_set1_epi64x(0xfffffULL);
const __m256i kmask=_mm256_set1_epi64x(0xfffffULL<<43);
const __m256i keepmask=_mm256_set1_epi64x((1ULL<<42)|0xfffffULL);
for(;j+4<=cx;j+=4){
if(j+67<cx)for(int z=0;z<4;z++)__builtin_prefetch(&XN[E_ID(cross[j+64+z])],0,1);
__m256i v=_mm256_loadu_si256((const __m256i*)(cross+j));
__m256i ix=_mm256_and_si256(v,idmask);
__m128i c=_mm256_i64gather_epi32((const int*)XN,ix,4);
__m256i kb=_mm256_slli_epi64(_mm256_cvtepu32_epi64(c),22);
__m256i ka=_mm256_and_si256(_mm256_slli_epi64(v,21),kmask);
__m256i res=_mm256_or_si256(_mm256_or_si256(ka,kb),_mm256_and_si256(v,keepmask));
_mm256_storeu_si256((__m256i*)(cross+j),res);
}
for (; j < cx; j++) {
if (j + 64 < cx) __builtin_prefetch(&XN[E_ID(cross[j + 64])], 0, 1);
u64 v = cross[j];
cross[j] = ((v << 21) & (0xFFFFFull << 43)) | (v & (1ull << 42)) | (v & 0xFFFFFull) |
((u64)XN[E_ID(v)] << 22);
}
} else if (PROM && !(FUSE_OK && D == KT - 3)) {
for (int j = 0; j < cx; j++) {
u64 v = cross[j];
cross[j] = ((v << 21) & (0xFFFFFull << 43)) | (v & (1ull << 42)) | (v & 0xFFFFFull);
}
}
if (FUSE_OK && D == KT - 3) {
u32 *dirt = (u32 *)ABtop; ABtop += (cx + 3) / 2 + 1;
ctr_solve(cross, cx, dirt);
} else {
solve_t<KT, D + 1, false>(cross, cx, nullptr);
}
ABtop = save;
}
template <int KT, int D, bool NEED>
static inline void solve_t(u64 *seq, int m, u64 *out) {
if (m <= 1) return;
solve_b<KT, D, NEED>(seq, m, out, TB<(D >= KT - 1)>());
}
// ====================================================================================
static u32 *g_ord, *g_x;
#ifndef MF_S0P
#define MF_S0P 16
#endif
#ifdef R111B_RT_S0P
static int g_s0p = 16;
#define S0P g_s0p
#else
#define S0P MF_S0P
#endif
static void sort0(int n) {
const u32 *X0 = XD[0];
u32 *cnt = g_x;
/* [R132A-HIST8] 计数表 u32 -> u8：靶 4 MB -> 1 MB。AB 在 sort0 期间空闲
（run_t: ABtop=AB -> sort0 -> ev=AB）=> 借用其首 n+1 字节，零额外静态内存。
人口守恒检查兜底：任一桶 >255 时 u8 回绕使 sum != n => 走 u32 原路，输出不变。 */
u8 *hist = reinterpret_cast<u8 *>(AB);
memset(hist, 0, (size_t)n + 1);
for (int i = 0; i < n; i++) {
if (i + S0P < n) {
u32 vf = X0[i + S0P];
__asm__ __volatile__("prefetchw %0" :: "m"(*(const char *)(&hist[vf + 1])));
}
++hist[X0[i] + 1];
}
u32 sum = 0;
for (int v = 0; v <= n; v++) { sum += hist[v]; cnt[v] = sum; }
if (sum != (u32)n) {
memset(cnt, 0, sizeof(u32) * (size_t)(n + 1));
for (int i = 0; i < n; i++) cnt[X0[i] + 1]++;
for (int i = 0; i < n; i++) cnt[i + 1] += cnt[i];
}
for (int i = 0; i < n; i++) {
if (i + S0P < n) {
u32 vf = X0[i + S0P];
__builtin_prefetch(&cnt[vf], 0, 3);
__asm__ __volatile__("prefetchw %0" :: "m"(*(const char *)(&g_ord[cnt[vf]])));
}
g_ord[cnt[X0[i]]++] = (u32)i;
}
}
template <int KT>
static void run_t(int n, const u32 **x, u32 *out) {
LFSH = 0; LFD = 0; CTN = (u32)n;
for (int d = 0; d < KT; d++) XD[d] = x[d];
OUT = out;
ABtop = AB;
if (n <= 1) return;
FUSE_OK = (KT >= 4 && n > 2 && (u32)n < CT_MAXV);
if(FUSE_OK){
const u32*XL=XD[KT-1];size_t count=((size_t)n+31)/32;
memset(CT1,0,(count+8)*sizeof(u16));
for(int i=0;i<n;i++)if(++CT1[XL[i]>>5]>255){FUSE_OK=0;break;}
memset(CT1,0,(count+8)*sizeof(u16));
}
{
int bit = 0;
while ((n >> bit) >= LEAFNB && bit < 30) bit++;
LFSH = bit; LFD = 0;
}
G_LIM = (int)(((u32)(n - 1)) >> (LFSH + LFD)) + 2;
sort0(n);
const u32 *X0 = XD[0], *X1 = XD[1];
u64 *ev = AB; // top-level event array: 2n entries
int m=0,g=0;
const u32 *X2=XD[2];
for(int value=0;value<n;value++){
int g1=(int)g_x[value], count=g1-g;
for(int t=g;t<g1;t++){
u32 q=g_ord[t];
u64 v=mk2(X1[q],0,X2[q],q);
ev[m+t-g]=v;
ev[m+count+t-g]=v|(1ull<<42);
}
m+=2*count;g=g1;
}
ABtop = AB + m;
solve_t<KT, 0, false>(ev, m, nullptr);
}
} // namespace kg
static u64 g_arena[KG_ARENA];
static u32 g_ord_st[1048576], g_x_st[1048576];
static int g_ready = 0;
static void setup() {
if (g_ready) return;
g_ready = 1;
kg::AB = g_arena;
kg::g_ord = g_ord_st;
kg::g_x = g_x_st;
}
void count_4d(int n, const unsigned *x[4], unsigned *out) {
setup();
memset(out, 0, sizeof(unsigned) * (size_t)n);
kg::run_t<4>(n, (const unsigned **)x, out);
}
void count_5d(int n, const unsigned *x[5], unsigned *out) {
setup();
memset(out, 0, sizeof(unsigned) * (size_t)n);
kg::run_t<5>(n, (const unsigned **)x, out);
}
void count_6d(int n, const unsigned *x[6], unsigned *out) {
setup();
memset(out, 0, sizeof(unsigned) * (size_t)n);
kg::run_t<6>(n, (const unsigned **)x, out);
}
#pragma GCC pop_options
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